LCD Interface ====================== +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | Pin | Signal | Description | type | I/O | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | 117-128, | LCD_D[0-23] | LCD Data | | | | 130-141 | | | | | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | 143 | HSYNC | Line Pulse or HSync | | | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | 144 | VSYNC | rame Sync or VSync—This signal also serves as the clock signal output for gate; | | | | | | driver (dedicated signal SPS for Sharp panel HR-TFT) | | | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | 145 | OE_ACD | Alternate Crystal Direction/Output Enable | | | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ | 146 | LSCLK | Shift Clock | | | +-----------+-------------+---------------------------------------------------------------------------------+------+-----+ The LCD Controller of the i.MX processors provides display data for external greyscale or color LCD panels. The LCD Controller is capable of supporting black-and-white, greyscale, passive-matrix color (passive color or CSTN), and active-matrix color (active color or TFT) LCD panels. The TX LCD Interface defines a generic 24 bit Panel Interface LCD_D[23..0]. The TFT color channel assignments are shown in the table below: +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | LCD_D | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +============+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+====+ | TX28 | LD | LD | LD | LD | | | | | LD | LD | | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | | TX51 | 23 | 22 | 21 | 20 | LD | LD | LD | LD | 15 | 14 | LD | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | TX53 | | | | | 19 | 18 | 17 | 16 | | | 13 | | | | | | | | | | | | | | | TX6 | | | | | | | | | | | | | | | | | | | | | | | | | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | TX48 | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | LD | | | 4 | 3 | 2 | 1 | 0 | 16 | 18 | 21 | 10 | 9 | 8 | 7 | 6 | 5 | 19 | 22 | 15 | 14 | 13 | 12 | 11 | 17 | 20 | 23 | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | TX25 | LD | LD | LD | LD | LD | LD | GP | GP | LD | LD | LD | LD | LD | LD | GP | GP | LD | LD | LD | LD | LD | LD | GP | GP | | TX27 | 17 | 16 | 15 | 14 | 13 | 12 | IO | IO | 11 | 10 | 9 | 8 | 7 | 6 | IO | IO | 5 | 4 | 3 | 2 | 1 | 0 | IO | IO | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 24bpp | R7 | R6 | R5 | R4 | R3 | R2 | R1 | R0 | G7 | G6 | G5 | G4 | G3 | G2 | G1 | G0 | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 18bpp | R5 | R4 | R3 | R2 | R1 | R0 | | | G5 | G4 | G3 | G2 | G1 | G0 | | | B5 | B4 | B3 | B2 | B1 | B0 | | | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 16bpp [1]_ | R4 | R3 | R2 | R1 | R0 | | | | G5 | G4 | G3 | G2 | G1 | G0 | | | B4 | B3 | B2 | B1 | B0 | | | | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 12bpp | R3 | R2 | R1 | R0 | | | | | G3 | G2 | G1 | G0 | | | | | B3 | B2 | B1 | B0 | | | | | +------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ With this assignment the two module types – 18bpp like the TX25 and TX27 and 24bpp like the TX51 – can be used on the same carrier board without any change. On 18bpp modules the unused bits are always connected to General Purpose IOs to be able to drive these to a defined level. +--------+-------------------------------------------------------------------------------------------------------+ | Module | Remark [1]_ | +========+=======================================================================================================+ | TX48 | The blue and red color assignments to the LCD data pins are reversed when operating in RGB888 (24bpp) | | | mode compared to RGB565 (16bpp) mode. Using the LCD Controller with | | | this connection scheme limits the use of RGB565 mode. Any data | | | generated for the RGB565 mode requires the red and blue color data | | | values be swapped in order to display the correct color. | +--------+-------------------------------------------------------------------------------------------------------+ .. [1] AM335x ARM® Cortex-A8 Microprocessors (MPUs) Silicon Errata