QS-Standard pinout, description and layout guidelines
The information contained within this Specification, including but not limited to any product specification, is subject to change without notice. Ka-Ro electronics provides no warranty with regard to this Specification or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing.
The QS-Standard description is intended for technically qualified personnel. It is not intended for general audiences.
Acronyms and Abbreviations¶
|100-Base-T||Ethernet type that uses 100 Mega bits per second speed on RJ45 connectors and twisted pair wiring|
|ARM||Advanced RISC Machines Limited CPU architecture|
|JTAG||Joint Test Action Group. This abbreviation is commonly used to refer to a test interface found on many modern integrated circuits. The JTAG test interface is a boundary scan register with serial interface and is described by an IEEE standard|
|GPIO||General Purpose Input/Output|
|LCD||Liquid Crystal Display|
|LED||Light Emitting Diode. An electronic component used as a visual indicator (light).|
|PCB||Printed Circuit Board|
|RAM||Random Access Memory|
|RoHS||Restriction on Hazardous Substances: The Directive on the Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic Equipment 2002/95/EC.|
|UART||Universal Asynchronous Receiver/Transmitter|
|USB||Universal Serial Bus|