Build and run of Multicore RPMsg-Lite demo¶

The Multicore RPMsg-Lite string echo project is a simple demonstration program that uses the MCUXpresso SDK software and the RPMsg-Lite library and shows how to implement the inter-core communicaton between cores of the multicore system.

It works with Linux RPMsg master peer to transfer string content back and forth. The name service handshake is performed first to create the communication channels. Next, Linux OS waits for user input to the RPMsg virtual tty. Anything which is received is sent to M4/7. M4/7 displays what is received, and echoes back the same message as an acknowledgement. The tty reader on the Linux side can get the message, and start another transaction. The demo demonstrates RPMsg’s ability to send arbitrary content back and forth.

precautions¶

The following precautions must be met to run the Multicore RPMsg-Lite demo:

the U-Boot must support the bootaux command
the Linux must provide imx_rpmsg_tty kernel module
the Linux device tree must support the Cortex®-M4/7 and reserved memory areas for communication of the two cores.

please note

All these precautions are met when the distro feature copro is installed and the karo-copro device tree overlay is added to the appropriate overlay variable.

For more information about customizing the BSP for coprocessor support, please see Customizing the BSP for coprocessor support

boot M4/7 coprocessor from Tightly-Coupled Memory (TCM)¶

Assuming the coprocessor firmware is stored in the bootfs partition, the coprocessor is booted with the following commands:

load mmc ${mmcdev}:1 ${loadaddr} rpmsg_lite_str_echo_rtos.bin
cp.b ${fileaddr} 0x7e0000 0x20000
bootaux 0x7e0000

boot M4 coprocessor from DRAM on a TX8M-1610 SOM¶

Before the firmware is build for starting from DRAM, the linker skript must be modified according to the address buffers defined in the device tree:

/* Specify the memory areas */
MEMORY
{
  m_interrupts          (RX)  : ORIGIN = 0x77000000, LENGTH = 0x00000240
  m_text                (RX)  : ORIGIN = 0x77000240, LENGTH = 0x001FFDC0
  m_data                (RW)  : ORIGIN = 0x77200000, LENGTH = 0x00200000
  m_data2               (RW)  : ORIGIN = 0x77400000, LENGTH = 0x00C00000
}

Assuming the coprocessor firmware is stored in the bootfs partition, the coprocessor is booted with the following commands:

load mmc ${mmcdev}:1 0x77000000 rpmsg_lite_str_echo_rtos.bin
dcache flush
bootaux 0x77000000

boot M7 coprocessor from DRAM on a TX8M-ND00 SOM¶

The TX8M-ND00 has only 512 MBytes of DRAM. The M7 coprocessor can access the DRAM in its address range 0x4000_0000 - 0x5fff-ffff. Unfortunately, this memory region of the Cortex®-M7 is declared as Peripheral and has the attribute Execute Never (XN). That means that the processor prevents instruction accesses.

Running the firmware from DRAM is possible anyway with a trick. As the 515 MBytes are mirrored 4 times in the 2 GBytes DRAM address range of the Cortex®-M7 coprocessor, we link the firmware for the 2nd 515 MBytes memory region. Therefore, we have to set up the linker skript in the following way:

/* Specify the memory areas */
MEMORY
{
  m_interrupts          (RX)  : ORIGIN = 0x77000000, LENGTH = 0x00000240
  m_text                (RX)  : ORIGIN = 0x77000240, LENGTH = 0x001FFDC0
  m_data                (RW)  : ORIGIN = 0x77200000, LENGTH = 0x00200000
  m_data2               (RW)  : ORIGIN = 0x77400000, LENGTH = 0x00C00000
}

Assuming the coprocessor firmware is stored in the bootfs partition, the coprocessor is booted with the following commands:

load mmc ${mmcdev}:1 0x57000000 rpmsg_lite_str_echo_rtos.bin
dcache flush
bootaux 0x57000000

The bootaux command analyses the binary at address 0x5700_0000 and initialises the reset vector for the coprocessor to 0x7700_0240 as specified in the linker skript.

boot Linux¶

Boot the Linux with the boot command from U-Boot.

load module¶

Load the imx_rpmsg_tty kernel module:

insmod /lib/modules/<Linux-Kernel-Version>/kernel/drivers/rpmsg/imx_rpmsg_tty.ko

you should now find a virtual device /dev/ttyRPMSG30.