3.15. LCD Interface

Pin	Signal	Description	type	I/O
117-128, 130-141	LCD_D[0-23]	LCD Data
143	HSYNC	Line Pulse or HSync
144	VSYNC	rame Sync or VSync—This signal also serves as the clock signal output for gate; driver (dedicated signal SPS for Sharp panel HR-TFT)
145	OE_ACD	Alternate Crystal Direction/Output Enable
146	LSCLK	Shift Clock

The LCD Controller of the i.MX processors provides display data for external greyscale or color LCD panels. The LCD Controller is capable of supporting black-and-white, greyscale, passive-matrix color (passive color or CSTN), and active-matrix color (active color or TFT) LCD panels.

The TX LCD Interface defines a generic 24 bit Panel Interface LCD_D[23..0]. The TFT color channel assignments are shown in the table below:

LCD_D	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
TX28 TX51 TX53 TX6	LD 23	LD 22	LD 21	LD 20	LD 19	LD 18	LD 17	LD 16	LD 15	LD 14	LD 13	LD 12	LD 11	LD 10	LD 9	LD 8	LD 7	LD 6	LD 5	LD 4	LD 3	LD 2	LD 1	LD 0
TX48	LD 4	LD 3	LD 2	LD 1	LD 0	LD 16	LD 18	LD 21	LD 10	LD 9	LD 8	LD 7	LD 6	LD 5	LD 19	LD 22	LD 15	LD 14	LD 13	LD 12	LD 11	LD 17	LD 20	LD 23
TX25 TX27	LD 17	LD 16	LD 15	LD 14	LD 13	LD 12	GP IO	GP IO	LD 11	LD 10	LD 9	LD 8	LD 7	LD 6	GP IO	GP IO	LD 5	LD 4	LD 3	LD 2	LD 1	LD 0	GP IO	GP IO
24bpp	R7	R6	R5	R4	R3	R2	R1	R0	G7	G6	G5	G4	G3	G2	G1	G0	B7	B6	B5	B4	B3	B2	B1	B0
18bpp	R5	R4	R3	R2	R1	R0			G5	G4	G3	G2	G1	G0			B5	B4	B3	B2	B1	B0
16bpp [1]	R4	R3	R2	R1	R0				G5	G4	G3	G2	G1	G0			B4	B3	B2	B1	B0
12bpp	R3	R2	R1	R0					G3	G2	G1	G0					B3	B2	B1	B0

With this assignment the two module types – 18bpp like the TX25 and TX27 and 24bpp like the TX51 – can be used on the same carrier board without any change. On 18bpp modules the unused bits are always connected to General Purpose IOs to be able to drive these to a defined level.

Module	Remark [1]
TX48	The blue and red color assignments to the LCD data pins are reversed when operating in RGB888 (24bpp) mode compared to RGB565 (16bpp) mode. Using the LCD Controller with this connection scheme limits the use of RGB565 mode. Any data generated for the RGB565 mode requires the red and blue color data values be swapped in order to display the correct color.

[1]	(1, 2) AM335x ARM® Cortex-A8 Microprocessors (MPUs) Silicon Errata